29 #ifndef _CCL_OCLVERSIONS_H_ 
   30 #define _CCL_OCLVERSIONS_H_ 
   32 #if defined(__APPLE__) || defined(__MACOSX) 
   33     #include <OpenCL/opencl.h> 
   35     #include <CL/opencl.h> 
   37         #include <CL/cl_dx9_media_sharing.h> 
   42 #if defined(__APPLE__) || defined(__MACOSX) 
   43     #define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD        0x4036 
   44     typedef cl_ulong cl_device_partition_property_ext;
 
   45     #define CL_DEVICE_PARTITION_EQUALLY_EXT             0x4050 
   46     #define CL_DEVICE_PARTITION_BY_COUNTS_EXT           0x4051 
   47     #define CL_DEVICE_PARTITION_BY_NAMES_EXT            0x4052 
   48     #define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT  0x4053 
   49     #define CL_AFFINITY_DOMAIN_L1_CACHE_EXT             0x1 
   50     #define CL_AFFINITY_DOMAIN_L2_CACHE_EXT             0x2 
   51     #define CL_AFFINITY_DOMAIN_L3_CACHE_EXT             0x3 
   52     #define CL_AFFINITY_DOMAIN_L4_CACHE_EXT             0x4 
   53     #define CL_AFFINITY_DOMAIN_NUMA_EXT                 0x10 
   54     #define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT     0x100 
   55     #define CL_PROPERTIES_LIST_END_EXT                  ((cl_device_partition_property_ext) 0) 
   56     #define CL_COMMAND_ACQUIRE_DX9_MEDIA_SURFACES_KHR        0x202B 
   57     #define CL_COMMAND_RELEASE_DX9_MEDIA_SURFACES_KHR        0x202C 
   61 #ifndef CL_VERSION_1_1 
   63     #define CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE 0x11B3 
   64     #define CL_KERNEL_PRIVATE_MEM_SIZE                  0x11B4 
   66     #define CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF       0x1034 
   67     #define CL_DEVICE_HOST_UNIFIED_MEMORY               0x1035 
   68     #define CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR          0x1036 
   69     #define CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT         0x1037 
   70     #define CL_DEVICE_NATIVE_VECTOR_WIDTH_INT           0x1038 
   71     #define CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG          0x1039 
   72     #define CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT         0x103A 
   73     #define CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE        0x103B 
   74     #define CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF          0x103C 
   75     #define CL_DEVICE_OPENCL_C_VERSION                  0x103D 
   77     #define CL_FP_SOFT_FLOAT                            (1 << 6) 
   79     #define CL_COMMAND_READ_BUFFER_RECT                 0x1201 
   80     #define CL_COMMAND_WRITE_BUFFER_RECT                0x1202 
   81     #define CL_COMMAND_COPY_BUFFER_RECT                 0x1203 
   82     #define CL_COMMAND_USER                             0x1204 
   83     #define CL_COMMAND_BARRIER                          0x1205 
   84     #define CL_COMMAND_GL_FENCE_SYNC_OBJECT_KHR     0x200D 
   89 #ifndef CL_VERSION_1_2 
   90     typedef intptr_t            cl_device_partition_property;
 
   91     typedef cl_bitfield         cl_device_affinity_domain;
 
   92     typedef cl_bitfield         cl_mem_migration_flags;
 
   93     typedef cl_uint             cl_kernel_arg_info;
 
   95     #define CL_COMPILE_PROGRAM_FAILURE                  -15 
   96     #define CL_LINK_PROGRAM_FAILURE                     -17 
   98     #define CL_DEVICE_TYPE_CUSTOM                       (1 << 4) 
  100     #define CL_DEVICE_PARTITION_EQUALLY                 0x1086 
  101     #define CL_DEVICE_PARTITION_BY_COUNTS               0x1087 
  102     #define CL_DEVICE_PARTITION_BY_COUNTS_LIST_END      0x0 
  103     #define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN      0x1088 
  105     #define CL_DEVICE_AFFINITY_DOMAIN_NUMA                     (1 << 0) 
  106     #define CL_DEVICE_AFFINITY_DOMAIN_L4_CACHE                 (1 << 1) 
  107     #define CL_DEVICE_AFFINITY_DOMAIN_L3_CACHE                 (1 << 2) 
  108     #define CL_DEVICE_AFFINITY_DOMAIN_L2_CACHE                 (1 << 3) 
  109     #define CL_DEVICE_AFFINITY_DOMAIN_L1_CACHE                 (1 << 4) 
  110     #define CL_DEVICE_AFFINITY_DOMAIN_NEXT_PARTITIONABLE       (1 << 5) 
  112     #define CL_DEVICE_LINKER_AVAILABLE                  0x103E 
  113     #define CL_DEVICE_BUILT_IN_KERNELS                  0x103F 
  114     #define CL_DEVICE_IMAGE_MAX_BUFFER_SIZE             0x1040 
  115     #define CL_DEVICE_IMAGE_MAX_ARRAY_SIZE              0x1041 
  116     #define CL_DEVICE_PARENT_DEVICE                     0x1042 
  117     #define CL_DEVICE_PARTITION_MAX_SUB_DEVICES         0x1043 
  118     #define CL_DEVICE_PARTITION_PROPERTIES              0x1044 
  119     #define CL_DEVICE_PARTITION_AFFINITY_DOMAIN         0x1045 
  120     #define CL_DEVICE_PARTITION_TYPE                    0x1046 
  121     #define CL_DEVICE_REFERENCE_COUNT                   0x1047 
  122     #define CL_DEVICE_PREFERRED_INTEROP_USER_SYNC       0x1048 
  123     #define CL_DEVICE_PRINTF_BUFFER_SIZE                0x1049 
  124     #define CL_DEVICE_IMAGE_PITCH_ALIGNMENT             0x104A 
  125     #define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT      0x104B 
  127     #define CL_COMMAND_BARRIER                          0x1205 
  128     #define CL_COMMAND_MIGRATE_MEM_OBJECTS              0x1206 
  129     #define CL_COMMAND_FILL_BUFFER                      0x1207 
  130     #define CL_COMMAND_FILL_IMAGE                       0x1208 
  131     #define CL_COMMAND_ACQUIRE_DX9_MEDIA_SURFACES_KHR        0x202B 
  132     #define CL_COMMAND_RELEASE_DX9_MEDIA_SURFACES_KHR        0x202C 
  137 #ifndef CL_VERSION_2_0 
  139     typedef cl_bitfield         cl_device_svm_capabilities;
 
  140     typedef cl_bitfield         cl_queue_properties;
 
  141     typedef cl_bitfield         cl_sampler_properties;
 
  143     #define CL_COMMAND_SVM_FREE                         0x1209 
  144     #define CL_COMMAND_SVM_MEMCPY                       0x120A 
  145     #define CL_COMMAND_SVM_MEMFILL                      0x120B 
  146     #define CL_COMMAND_SVM_MAP                          0x120C 
  147     #define CL_COMMAND_SVM_UNMAP                        0x120D 
  149     #define CL_DEVICE_QUEUE_ON_HOST_PROPERTIES              0x102A 
  150     #define CL_DEVICE_MAX_READ_WRITE_IMAGE_ARGS             0x104C 
  151     #define CL_DEVICE_MAX_GLOBAL_VARIABLE_SIZE              0x104D 
  152     #define CL_DEVICE_QUEUE_ON_DEVICE_PROPERTIES            0x104E 
  153     #define CL_DEVICE_QUEUE_ON_DEVICE_PREFERRED_SIZE        0x104F 
  154     #define CL_DEVICE_QUEUE_ON_DEVICE_MAX_SIZE              0x1050 
  155     #define CL_DEVICE_MAX_ON_DEVICE_QUEUES                  0x1051 
  156     #define CL_DEVICE_MAX_ON_DEVICE_EVENTS                  0x1052 
  157     #define CL_DEVICE_SVM_CAPABILITIES                      0x1053 
  158     #define CL_DEVICE_GLOBAL_VARIABLE_PREFERRED_TOTAL_SIZE  0x1054 
  159     #define CL_DEVICE_MAX_PIPE_ARGS                         0x1055 
  160     #define CL_DEVICE_PIPE_MAX_ACTIVE_RESERVATIONS          0x1056 
  161     #define CL_DEVICE_PIPE_MAX_PACKET_SIZE                  0x1057 
  162     #define CL_DEVICE_PREFERRED_PLATFORM_ATOMIC_ALIGNMENT   0x1058 
  163     #define CL_DEVICE_PREFERRED_GLOBAL_ATOMIC_ALIGNMENT     0x1059 
  164     #define CL_DEVICE_PREFERRED_LOCAL_ATOMIC_ALIGNMENT      0x105A 
  166     #define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER           (1 << 0) 
  167     #define CL_DEVICE_SVM_FINE_GRAIN_BUFFER             (1 << 1) 
  168     #define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM             (1 << 2) 
  169     #define CL_DEVICE_SVM_ATOMICS                       (1 << 3) 
  174 #ifndef CL_VERSION_2_1 
  177     #define CL_DEVICE_IL_VERSION                             0x105B 
  178     #define CL_DEVICE_MAX_NUM_SUB_GROUPS                     0x105C 
  179     #define CL_DEVICE_SUB_GROUP_INDEPENDENT_FORWARD_PROGRESS 0x105D 
  181     #define CL_UNORM_INT_101010_2                       0x10E0 
  187 #ifndef CL_DEVICE_TERMINATE_CAPABILITY_KHR 
  188     #define CL_DEVICE_TERMINATE_CAPABILITY_KHR          0x200F 
  190 #ifndef CL_COMMAND_EGL_FENCE_SYNC_OBJECT_KHR 
  191     #define CL_COMMAND_EGL_FENCE_SYNC_OBJECT_KHR  0x202F 
  193 #ifndef CL_COMMAND_ACQUIRE_EGL_OBJECTS_KHR 
  194     #define CL_COMMAND_ACQUIRE_EGL_OBJECTS_KHR    0x202D 
  196 #ifndef CL_COMMAND_RELEASE_EGL_OBJECTS_KHR 
  197     #define CL_COMMAND_RELEASE_EGL_OBJECTS_KHR    0x202E 
  199 #ifndef CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 
  200     #define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV       0x4000 
  202 #ifndef CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 
  203     #define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV       0x4001 
  205 #ifndef CL_DEVICE_REGISTERS_PER_BLOCK_NV 
  206     #define CL_DEVICE_REGISTERS_PER_BLOCK_NV            0x4002 
  208 #ifndef CL_DEVICE_WARP_SIZE_NV 
  209     #define CL_DEVICE_WARP_SIZE_NV                      0x4003 
  211 #ifndef CL_DEVICE_GPU_OVERLAP_NV 
  212     #define CL_DEVICE_GPU_OVERLAP_NV                    0x4004 
  214 #ifndef CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 
  215     #define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV            0x4005 
  217 #ifndef CL_DEVICE_INTEGRATED_MEMORY_NV 
  218     #define CL_DEVICE_INTEGRATED_MEMORY_NV              0x4006 
  220 #ifndef CL_COMMAND_ACQUIRE_D3D10_OBJECTS_KHR 
  221     #define CL_COMMAND_ACQUIRE_D3D10_OBJECTS_KHR         0x4017 
  223 #ifndef CL_COMMAND_RELEASE_D3D10_OBJECTS_KHR 
  224     #define CL_COMMAND_RELEASE_D3D10_OBJECTS_KHR         0x4018 
  226 #ifndef CL_COMMAND_ACQUIRE_D3D11_OBJECTS_KHR 
  227     #define CL_COMMAND_ACQUIRE_D3D11_OBJECTS_KHR         0x4020 
  229 #ifndef CL_COMMAND_RELEASE_D3D11_OBJECTS_KHR 
  230     #define CL_COMMAND_RELEASE_D3D11_OBJECTS_KHR         0x4021 
  232 #ifndef CL_DEVICE_MAX_ATOMIC_COUNTERS_EXT 
  233     #define CL_DEVICE_MAX_ATOMIC_COUNTERS_EXT           0x4032 
  235 #ifndef CL_DEVICE_TOPOLOGY_AMD 
  236     #define CL_DEVICE_TOPOLOGY_AMD                      0x4037 
  238 #ifndef CL_DEVICE_BOARD_NAME_AMD 
  239     #define CL_DEVICE_BOARD_NAME_AMD                    0x4038 
  241 #ifndef CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 
  242     #define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD            0x4039 
  244 #ifndef CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD 
  245     #define CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD         0x4040 
  247 #ifndef CL_DEVICE_SIMD_WIDTH_AMD 
  248     #define CL_DEVICE_SIMD_WIDTH_AMD                    0x4041 
  250 #ifndef CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD 
  251     #define CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD        0x4042 
  253 #ifndef CL_DEVICE_WAVEFRONT_WIDTH_AMD 
  254     #define CL_DEVICE_WAVEFRONT_WIDTH_AMD               0x4043 
  256 #ifndef CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD 
  257     #define CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD           0x4044 
  259 #ifndef CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD 
  260     #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD      0x4045 
  262 #ifndef CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 
  263     #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 0x4046 
  265 #ifndef CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD 
  266     #define CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD   0x4047 
  268 #ifndef CL_DEVICE_LOCAL_MEM_BANKS_AMD 
  269     #define CL_DEVICE_LOCAL_MEM_BANKS_AMD               0x4048 
  271 #ifndef CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD 
  272     #define CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD        0x4049 
  274 #ifndef CL_DEVICE_SPIR_VERSIONS 
  275     #define CL_DEVICE_SPIR_VERSIONS                     0x40E0 
  277 #ifndef CL_DEVICE_PARENT_DEVICE_EXT 
  278     #define CL_DEVICE_PARENT_DEVICE_EXT                 0x4054 
  280 #ifndef CL_DEVICE_PARTITION_TYPES_EXT 
  281     #define CL_DEVICE_PARTITION_TYPES_EXT               0x4055 
  283 #ifndef CL_DEVICE_AFFINITY_DOMAINS_EXT 
  284     #define CL_DEVICE_AFFINITY_DOMAINS_EXT              0x4056 
  286 #ifndef CL_DEVICE_REFERENCE_COUNT_EXT 
  287     #define CL_DEVICE_REFERENCE_COUNT_EXT               0x4057 
  289 #ifndef CL_DEVICE_PARTITION_STYLE_EXT 
  290     #define CL_DEVICE_PARTITION_STYLE_EXT               0x4058 
  292 #ifndef CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 
  293     #define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM   0x40A0 
  295 #ifndef CL_DEVICE_PAGE_SIZE_QCOM 
  296     #define CL_DEVICE_PAGE_SIZE_QCOM                  0x40A1